1.
INTRODUCTION
The
term “ultrasonic” applied to sound refers to anything above the frequencies of
audible sound, and nominally includes anything over 20,000 Hz. Humans can hear
sounds from about 16 to 20 kHz. Pests like rat, mice can hear ultrasound, the
range of the rats hearing is around 200 Hz to 80 to 90 kHz.
Ultrasonic
pest repeller is a high-tech device that transmits high intensity sounds at
high frequencies. Sounds at such high frequency are not audible to human
beings. The sound generated are ‘fiendish’ in the way that penetrates the
pest’s brain and nervous system and causes fear discomfort and creates
intolerable environment for different kinds of pests but not audible to human beings
and absolutely no side effects.
The
major aim of this papper is to effectively design and fabricate an electronic
system that will be capable of produce ultrasonic sound when the supply is
given. Furthermore this device finds use not only in homes but as a
precautionary and protective interface in loading Docks, indoor and semi indoor
areas, warehouse, food processing units, factories, restaurants, meat shops,
etc and can be used almost everywhere.
A key feature of this
device is that it does not cause any irritation to human beings.
2.
BLOCK
DIAGRAM

3.
BLOCK
DIAGRAM DESCRIPTION
Block diagram has the following
components
3.1 SQUARE WAVE OSCILLATOR:
It consists of a IC CA
3130 which functions as an square wave oscillator. It is a free running
oscillator.
3.2 DECADE COUNTER:
The IC used here is CD 4017. The circuit of the
decade counter is similar to 4 bit ripple counter but with the aid of a logic
circuit, the count is limited to 9. As soon as the output sequence 1010 occurs
output of NAND gate becomes 0 and it resets the flip flops. Counting starts
again from 0.
3.3 AMPLIFIER CIRCUIT:
The IC used is 555
timer IC. An amplifier is an electronic circuit that is capable of amplifying
signals.
3.4 D FLIP FLOP:
The IC used is CD4013. D flip flop is
obtained by short circuiting the S and R input of the SR flip flop. This flip
flop is also called as Latch flip flop. It has only one input referred to as D
input or data input.
3.5 PUSH-PULL
AMPLIFIER:
The name push pull comes from the
fact that one transistor drive current through the load in one direction
(pushing) while the other transistor drives current in opposite direction
(pulling). This type of amplifiers do not need input transformer for phase
splitting. Thus cost and bulkiness of the circuit is reduced.
3.6
PIEZO TWEETER:
A piezo tweeter
contains a piezoelectric crystal coupled to mechanical diaphragm. An audio
signal is applied to the crystal, which responds by flexing in proportion to
the voltage applied across the crystals surfaces, thus converting electrical
energy to mechanical energy. This conversion is the basic for ultrasonic
testing. The active element is the heart of the transducer(a piece of polarized
material with electrodes attached to two of its opposite faces) converts
electrical energy to acoustics energy and vice versa.
4.
CIRCUIT DIAGRAM
CIRCUIT DIAGRAM
5. CIRCUIT DIAGRAM
DESCRIPTION
This circuit starts to operate as soon as the power
supply is on. In the circuit given there
are different stages. The first one is the square wave oscillator stage.
In square wave oscillator the
circuit generates square wave signals, and the output from this stage is given
as the input to the next stage ie the decade counter. Here the square wave oscillator
produces an output of 1 KHz. Here the IC used is an IC CA3130.
The next stage is the decade counter
or the mod 10 counter. Each square wave signals from the square wave oscillator
is counted using the decade counter. Here CD4017 IC is used as a decade
counter. The resistors connected at the output of the decade counter are of
varying values and thereby giving a varying output at the decade counter. The
diodes used here act as reverse protection diodes. They are fast switching
diodes.
This varying output of the decade
counter will of very small amplitude and thus this output has to be amplified.
And hence the next stage is the amplifier stage. Here a 555 IC is used. It is
an astable multivibrator. And hence the signal is amplified.
The amplified output is given to the
D flip flop. IC used is CD4013. It has 2 output states. Q and Q̅ . During the
first clock pulse Q is in logic 1 state and
Q̅ will be in logic 0 state. When Q is in logic 1 state transistor T1
and T4 will be in ON condition and transistor T2 and T3 will be OFF. Then
current will be flowing through the piezotweeter and it will make sound. During
this next clock pulse the Q will be in logic 0 state and Q will be in logic 1 state and during this time
the transistor T1 and T4 will be in OFF condition and transistor T3 and T2 will
be in ON condition. And thus current flow will be through the piezotweeter and
it will make sound. Here we are using bridge amplifier instead of single ended
amplifier to get high gain. It is also known as push pull amplifier.
6. COMPONENT LIST
|
COMPONENTS
|
SPECIFICATION
|
QUANTITY
|
||||
|
IC
|
TIMER
|
1
|
||||
|
|
CD4017
|
1
|
||||
|
|
CD4013
|
1
|
||||
|
|
CA3130
|
1
|
||||
|
TRANSISTOR
|
BD140
|
2
|
||||
|
|
BD139
|
2
|
||||
|
DIODE
|
1N4148
|
6
|
||||
|
CAPACITOR
|
1µF
|
1
|
||||
|
|
0.01µF
|
1
|
||||
|
|
330Pf
|
1
|
||||
|
RESISTOR
|
1K
|
2
|
||||
|
|
100K
|
4
|
||||
|
|
82K
|
1
|
||||
|
|
68K
|
1
|
||||
|
|
47K
|
1
|
||||
|
|
22K
|
1
|
||||
|
|
4.7K
|
1
|
||||
|
|
18K
|
1
|
||||
|
PIEZOTWEETER
|
|
1
|
||||
7.
COMPONENTS DESCRIPTION
7.1 555 TIMER IC
The 555 Timer IC is an integrated
circuit used in variety of timer, pulse generation and oscillator applications.
The IC design was proposed in 1970 by Hans R. Camenzied and Jim Ball. The 555
has three operating modes:
·
Monostable mode: in
this mode the 555 functions as a “one-shot” pulse generator.
·
Astable mode- free
running mode: the 555 can operate as an oscillator
·
Bistable mod or Schmitt
trigger: the 555 can operate as a flip-flop, if the DIS pin is not connected
and no capacitor is used.

Fig
1. Functional diagram of 555 timer

Fig
2. Pin out of IC 555
FEATURES
·
Direct replacement for
SE555/NE555.
·
Timing from
microseconds through hours.
·
Operates in both
astable and monostable modes.
·
Adjustable duty cycle.
·
Output can source or
sink 200 mA.
·
Output and supply TTL
compatible.
·
Temperature stability
better than 0.005% per ºC.
·
Normally on and
normally off.
·
Available in 8-pin MSOP
package.
APPLICATIONS
·
Precision timing.
·
Pulse generation.
·
Sequential timing.
·
Time delay generation.
·
Pulse width modulation.
·
Pulse position
modulation.
·
Linear ramp generator
DESCRIPTION
The LM555 is a highly
stable device for generating accurate time delays or oscillations. Additional
terminals are provided for triggering or resetting if desired. In the time
delay mode of operation, the time is precisely controlled by one external resistor
and capacitor. For astable operation as an oscillator, the free running
frequency and duty cycle are accurately controlled with two external resistor
and one capacitor.
7.2 CD4013
The CD4013B dual flip flop is a
monolithic complementary MOS (CMOS) intergrated circuit constructed with N
channel and P channel enhancement mode transistors. Each flip flop has
independant data, set, reset, and clock inputs and “Q” and “ Q̅” outputs. These
devices can be used for shift register applications, and by connecting Q bar
output to the data input, for counter and toggle applications. The logic level
present at the “D” input is transferred to the Q output during the positive
going pulse of the clock pulse. Setting or resetting is independent of the
clock and is accomplished by the high level on the set or reset line
respectively.

Fig
3. Pin out of CD4013
FEATURES
·
Wide supply voltage
range.
·
High noise immunity
·
Low power TTL
compatibility
APPLICATIONS
·
Automotive.
·
Alarm system.
·
Data terminals.
·
Industrial electronics.
·
Instrumentation.
·
Remote metering.
·
Medical electronics.
7.3 CD4017
The CD4017BM/cdd4017BC is a 5 stage
divide by 10 Johnson counter with 10 decoded outputs and a carry out bit. The
CD4022BM/CD4022BC is a 4 stage divide by 8 Johnson counter with 8 decoded
output and a carry-out bit. This counter is cleared to their zero count by a
logical “1” on their reset line. These counters are advanced on the positive
edge of the clock signal when the clock enable signal is in the logic “0”
state.
The configuration of the
CD4017BM/VD4013BC and CD4022BM/CD4022BC permits medium speed operation and
assures hard free counting sequences. The 10/8 decode outputs are normally in
logical “0” state and go to logical “1” state only at their respective time
slot. Each decoded output remains high for 1 full clock cycle. The carry-out
signal completes a full cycle for every 10/8 clock input cycles and is used as
a ripple carry signal to any succeeding stages.

Fig
4. Pinout of CD4017
FEATURES
·
Wide supply voltage range.
·
High noise immunity
·
Low power TTL
compatibility
·
Medium speed operation
·
Low power.
·
Fully static operation.
APPLICATIONS
·
Automotives.
·
Instrumentation.
·
Medical electronics.
·
Alarm systems
·
Industrial electronics.
·
Remote metering.
7.4 IN4148
·
IN4148-1 available in
JAN, JANTX, and JANTXV
·
Switching diode.
·
Hermetically sealed.
·
Metallurgically bonded.
·
Double plug
construction.
·
High switching speed
maximum of 4ns.
·
Continuous reverse
voltage.

Fig 5. IN4148
FEATURES
·
Glass package.
·
Axial leaded diode.
·
Lead temperature.-
260ºC
·
Maximum trr ≤ 4.0 ns
·
Minimum Bv ≥ 100V
7.5 BD 139
FEATURES
·
NPN silicon transistor.
·
Low supply- voltage
range 1.8V to 3.6V.
·
Ultralow – power
consumption.
·
Five power- saving
modes.
·
Wake-up from stand by
mode in less than 6µs.
APPLICATION
·
Audio amplifier.
·
Switching applications.

Fig
6. BD139
7.7 BD140
These epitaxial planar transistor
are mounted in the SOT-32 plastic package. They are designed for audio
amplifiers and drivers utilizing complementary or quasi-complementary circuits.
The NPN type are the BD 135 and BD 139, and the complementary PNP types are the
BD 136 and BD 140.
FEATURES
·
Products are
pre-selected in dc current gain.
·
High current (max. 1.5
A)
·
Low voltage (max. 80V)
APPLICATION
·
General purpose power
applications
·
Eg. Audio amplifier and
switching circuits.

Fig
7. BD 140 transistor
7.8 PIEZO TWEETER
A piezo(or piezo-electric) tweeter
contains a piezoelectric crystal coupled to a mechanical diaphragm. An audio
signal is applied to the crystal, which responds by flexing in proportion to
the voltage applied across the crystal’s surfaces, thus converting electrical
energy into mechanical. The conversion of electric pulses to mechanical
vibration and the conversion of returned mechanical vibration back to
electrical energy is the basis for ultrasonic testing. The active element is
the heart of the transducer as it converts the electric energy to acoustic
energy, and vice versa. The active element is basically a piece of polarized
material (i.e some parts of the molecule are positively charged, while other
parts of the molecule are negatively charged) with electrodes attached to two
of its opposite faces. When an electric field is applied across the material,
the polarized molecules will align themselves with the electric field,
resulting in induced dipoles with in the molecular or crystal structure of the
material. This alignment of molecules will cause the material to change
dimensions. This phenomenon is known as electrostriction. In addition, a
permanently-polarized material such as quartz or barium titanate will produce
an electric field when the material changes dimensions as a result of an
imposed mechanical force. This phenomenon is known as piezoelectric effect.

Fig
8. Piezo tweeter
7.9 CA 3130
CA3130 and CA 3130A are op amps that
combine the advantage of both bipolar transistors.
Gate-protected P-channel MOSFET
(PMOS) transistor are used in the input circuit to provide very-high-input
impedence, very low input current, and exceptional speed performance. The use
of PMOS transistor in the input stage results in common mode input voltage
capability down to 0.5 V below the negative supply terminal, an important
attribute in single supply applications.the CA3130 series circuits operate at
supply voltages ranging from 5V to 16 V. They can be phase compensated with a
single external capacitor, and have terminals for adjustments of offset voltage
for applications requiring offset-null capability. Terminal provisions are also
made to permit strobing of the output stage.
APPLICATIONS
·
Ground-referenced
single supply amplifiers.
·
Fast sample –hold
amplifiers.
·
High input impedence
comparators.
·
High input impedence
wideband amplifiers.
·
Long-duration timers/
monostable.
·
Voltage follower.
·
Photo- diode sensor
amplifiers.
FEATURES
·
Ideal for single supply
applications.
·
Pb- free plus anneal
available.
·
Common mode input
voltage range include negative supply rail; input terminals can be swung 0.5V
below negative supply rail.

Fig 9. CA3130
8. PCB DESIGN
8.1 PCB DESIGN PR
OCEDURE
8.1.1 Drawing the circuit schematic:
Drawing of the circuit is done through EAGLE (Easily
Applicable Graphics Layout Editor) schematic capture software. It includes many
libraries with thousands of component symbol. We can select the required symbol
from the library and place if in the schematic. After placing the component
symbols, we can complete the interconnection using wire os bus control
The next step is to assign to part reference. Each
component has to be assigned foot print or PCB art work. The component symbol
and foot symbol should correspond in all respects.
8.1.2 Design rule check
and net list creation
After
the circuit is schematic is completed with all required information such as
part reference and foot prints. The design rule check can be used for checking
errors, in the design it will check for duplicate symbol, overlapped lines and
dangling lines.
After
the schematic design and files passes the DRC, check, it is processed by a
program called an electric rule checker
thet checks for writing errors. The final operation to be done before starting
PCB art work is the net list creation.
A
net list creation of components and interconnection along with other
information such as foot print, track width etc. This list can be used as an
information source for remaining stages.
8.1.3
Creating the PCB art work
In
automatic design, the net list obtained from the previous stages is for getting
the required foot prints and interconnections. The software used for the PCB
network design is the orcad layout.
8.2 PCB FABRICATION
PROCESS
The
various steps involved in PCB fabrication process are listed below
·
Prepare the component
layout.
·
Convert the component
layout into PCB layout.
·
Cut the copper clad
sheet into desired size
·
Clean the copper-clad
sheet.
·
Trace the PCB layout on
the copper side.
·
Prepare etching
solution by mixing ferric chloride with water.
·
Etch the PCB for the
desired time
·
Clean the PCB and drill
the pads.
·
Solder the components
according to the circuit diagram.
9. SOLDERING
Soldering is the process of joining
two or more similar or dissimilar metals by melting another metal having lower
melting point.
9.1
SOLDERING FLUXES
In order to make the surface accept
the solder readily, the component terminal should be free from oxides and other
obstructing films. Soldering flux cleans the oxide from the surface of the
metal zinc chloride. Ammonium chloride and rosin are the commonly used fluxes.
It is used to melt the solder and apply at the joints in the circuits.
9.2
SOLDER
It is used for joining
two or more metal at temperature below their melting point. The popularly used
solder are alloys of tin(60%), that melts at 375 F and solidifies when it
cools.
9.3
SOLDERING IRON
It is used to melt the solder and
apply at the joints in the circuits.
10. PCB MODULE FORM

11. MERITS AND DEMERITS
11.1 MERITS:
·
It is a simple circuit.
·
Low cost components are
used and hence the circuit is cheaper.
·
It is a portable
device.
·
Operation of the device
is simple.
·
Easly install
·
Low level input.
11.2 DEMERITS:
·
It is difficult to find
out the frequencies that are harmful to different pests.
·
It is not applicable in
houses, if there is pets.
12. APPLICATIONS
· The
device can be used in home, Indoor and semi indoor areas, warehouse, food
processing units etc and can be used almost everywhere.
· Here
we are not killing the pests just repel them.
13. CONCLUSION
An ultrasonic pest repellent was
designed and constructed. The output has been verified to be of standard
quality and it successfully operates even in low voltage. This can modified for
wide frequency ranges. This device helps to repel pests but does not kill.
14. FUTURE SCOPE
·
This circuit can be
implemented to advanced version using microcontroller.
·
If automatic frequency
controller is implemented in this circuit, we can repel different types of
pests which is repelled at different frequency.
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